EDA and silicon IP revenue grew 12.8% in Q1 2025, totaling $5.098 billion compared to $4.522 billion in the same period last ...

Cognichip’s approach is to develop a physics-informed foundation model that achieves more parallelism than is available in ...

AMD is grabbing share from Intel in x86 data center processors at a rapid rate. As the chart above shows, AMD’s share is now ...

Employing more stress testing at the wafer level improves quality while reducing burn-in time and cost. So why isn’t it ...

Evaluating CPU Fuzzers via Automatic Bug Injection” was published by researchers at ETH Zurich. Abstract “Hardware fuzzing has recently gained momentum with many discovered bugs in open-source RISC-V ...

A new technical paper titled “Reduced Topography After Stop on Nitride (SON) STI CMP Through Improved Post-Bulk Planarity for ...

Designing Data Centers for Next-Gen Language Models” was published by Intel Corporation and Georgia Tech. An excerpt from the ...

A Photonic SRAM with Embedded XOR Logic for Ultra-Fast In-Memory Computing” was published by researchers at University of Wisconsin–Madison and USC. Abstract “Traditional von Neumann architectures ...

Advanced packaging is becoming a key differentiator for the high end of the mobile phone market, enabling higher performance, ...

Heterogeneous integration is a key enabler of today’s AI innovations. By bringing together multiple chips with different ...

Next-generation optical inspection is about more than just sensitivity. It’s about reliably seeing through complexity.

In Part 1, we explored the challenges of implementing machine learning and real-time analytics in semiconductor ...